ارائه یک مکانیزم درون تراشه برای تشخیص حملات زنجیره پویش در تراشه‌های رمزنگاری
محورهای موضوعی : مهندسی برق و کامپیوتر
فاطمه جمالی زواره
1
(دانشگاه علم و صنعت ایران)
حاکم بیت‌الهی
2
(دانشگاه علم و صنعت ايران)
کلید واژه: امنیت سخت‌افزارآزمون‌پذیریحملات مبتنی بر زنجیره پویش,
چکیده مقاله :
با پیدایش تراشه‌های رمزنگاری، حملات کانال جانبی تهدید جدیدی علیه الگوریتم‌های رمزنگاری و سیستم‌های امنیتی به شمار می‌روند. حملات کانال جانبی به ضعف‌های محاسباتی الگوریتم‌ها کاری نداشته و از ضعف‌های پیاده‌سازی استفاده می‌نمایند. زنجیره پویش که در آزمون تراشه‌ها کاربرد گسترده‌ای دارد، یکی از این کانال‌های جانبی است. برای جلوگیری از حمله با استفاده از زنجیره پویش، می‌توان ارتباط زنجیره‌های پویش را پس از آزمون ساخت از بین برد اما این روش، امکان آزمون پس از ساخت و همچنین به‌روزرسانی مدارها را غیر ممکن می‌سازد. بنابراین باید علاوه بر حفظ آزمون‌پذیری زنجیره پویش، به دنبال روشی برای جلوگیری از حملات کانال جانبی ناشی از آن بود. در این مقاله روشی ارائه شده که بتواند حمله مهاجم را شناسایی کند و از حمله با استفاده از زنجیره پویش جلوگیری نماید. در این روش با مجازشماری کاربر، خروجی متناسب، تولید شده و از دسترسی مهاجم به اطلاعات حساس جلوگیری خواهد گردید. روش ارائه‌شده با سربار مساحت کمتر از 1%، سربار توان مصرفی ایستای حدود 1% و سربار تأخیر ناچیز، قابلیت آزمون‌پذیری را حفظ کرده و می‌تواند از حملات مبتنی بر زنجیره پویش تفاضلی و مبتنی بر امضا بهتر از روش‌های پیشین جلوگیری کند.
Since the advent of cryptographic chips, the side channel attacks have become a serious threat to cryptographic algorithms and security systems. The side channel attacks use weaknesses in the chip implementation instead of using the computational weaknesses of the algorithms. The scan chain that is widely used in the chip test is one of these side channels. To avoid an attack using a scan chain, one can remove the scan chain after the construction test, but this method makes it impossible to test the post-construction and updating the circuit. Therefore, in addition to preserving the testability of the scan chain, it is necessary to look for a method to prevent the side channel attacks. In this article, a method is proposed to identify the attacker and prevent his scan-based attacks. In this way, by the user authorization, the corresponding output will be generated and the attacker's access to sensitive information is prevented. The proposed method, with an area overhead of less than 1%, power overhead around 1% and a negligible delay overhead retains testability and can prevent differential and signature-based scan attacks better than previous state-of-the-art techniques.
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